01366nam a2200217Ia 4500 CTU_168425 210402s9999 xx 000 0 und d 55.5 621.3815364 B577 Bianchi, Giovanni Phase-locked loop synthesizer simulation Giovanni Bianchi New York McGraw-Hill 2005 Phase locked loops (PLLs) are electronic circuits that ensure that a communications signal stays locked on a given frequency. Their design is crucial to the workings of wireless communications systems. Virtually all transceivers use PLLs to synthesize the stable, high frequency oscillations necessary for radio & wireless. This book describes how to calculate PLL performances by using standard mathematical or circuit analysis programs. Theoretical descriptions are limited to the minimum needed to explain how to perform calculations. Although presented methods of analysis can be implemented with many commercial programs, their description always refers to Mathcad and SIMetrix. Phase-locked loops,Frequency synthesizers,Vòng khóa pha,Bộ tổng hợp tần số Computer simulation,Sự mô phỏng trên máy tính Năm Trung tâm Học liệu Trường Đại học Cần Thơ