<?xml version="1.0" encoding="UTF-8"?>
<collection xmlns="http://www.loc.gov/MARC21/slim">
 <record>
  <leader>01697nam a2200289 a 4500</leader>
  <controlfield tag="001">TVCDKTCT14630</controlfield>
  <controlfield tag="003">Thư viện trường Cao đẳng Kỹ thuật Cao Thắng</controlfield>
  <controlfield tag="005">20140617000000</controlfield>
  <controlfield tag="008">140617</controlfield>
  <datafield tag="980" ind1="\" ind2="\">
   <subfield code="a">Thư viện Trường CĐ Kỹ Thuật Cao Thắng</subfield>
  </datafield>
  <datafield tag="024" ind1=" " ind2=" ">
   <subfield code="a">RG_1 #1 eb0 i1</subfield>
  </datafield>
  <datafield tag="020" ind1="#" ind2="#">
   <subfield code="a">007163519X</subfield>
  </datafield>
  <datafield tag="041" ind1="0" ind2="#">
   <subfield code="a">vie</subfield>
  </datafield>
  <datafield tag="082" ind1="#" ind2="#">
   <subfield code="a">621.395 / </subfield>
   <subfield code="b">N100N-s</subfield>
  </datafield>
  <datafield tag="100" ind1="1" ind2="#">
   <subfield code="a">Kundu Sandip</subfield>
  </datafield>
  <datafield tag="245" ind1="0" ind2="0">
   <subfield code="a">Nanoscale CMOS VLSI Circuits: Design for Manufacturability /</subfield>
   <subfield code="c">Kundu Sandip, Sreedhar Aswin</subfield>
  </datafield>
  <datafield tag="260" ind1="#" ind2="#">
   <subfield code="a">NewYork :</subfield>
   <subfield code="b">Mc Graw-Hill ,</subfield>
   <subfield code="c">2010</subfield>
  </datafield>
  <datafield tag="300" ind1="#" ind2="#">
   <subfield code="a">316tr.</subfield>
  </datafield>
  <datafield tag="520" ind1="#" ind2="#">
   <subfield code="a">Cutting-Edge CMOS VLSI Design for Manufacturability Techniques</subfield>
  </datafield>
  <datafield tag="520" ind1="#" ind2="#">
   <subfield code="a">This detailed guide offers proven methods for optimizing circuit designs to increase the yield, reliability, and manufacturability of products and mitigate defects and failure. Covering the latest devices, technologies, and processes, Nanoscale CMOS VLSI Circuits: Design for Manufacturability focuses on delivering higher performance and lower power consumption. Costs, constraints, and computational efficiencies are also discussed in the practical resource.</subfield>
  </datafield>
  <datafield tag="520" ind1="#" ind2="#">
   <subfield code="a">Nanoscale CMOS VLSI Circuits covers:</subfield>
  </datafield>
  <datafield tag="520" ind1="#" ind2="#">
   <subfield code="a">    Current trends in CMOS VLSI design </subfield>
  </datafield>
  <datafield tag="520" ind1="#" ind2="#">
   <subfield code="a">Dr. Sandip Kundu is a professor in the Electrical and Computer Engineering Department at the University of Massachusetts at Amherst, specializing in semiconductor and lithographic manufacturing.</subfield>
  </datafield>
  <datafield tag="520" ind1="#" ind2="#">
   <subfield code="a">Dr. Aswin Sreedhar is a research assistant at the Electrical and Computer Engineering Department at the University of Massachusetts.</subfield>
  </datafield>
  <datafield tag="650" ind1="#" ind2="4">
   <subfield code="a">Nanoscale</subfield>
  </datafield>
  <datafield tag="650" ind1="#" ind2="4">
   <subfield code="a">CMOS VLSI Circuits</subfield>
  </datafield>
  <datafield tag="700" ind1="0" ind2="#">
   <subfield code="a">Sreedhar Aswin</subfield>
  </datafield>
 </record>
</collection>
