Computer architecture :
Chapter 1: Fundamentals of Computer Design; Chapter 2: Instruction-Level Parallelism and Its Exploitation; Chapter 3: Limits on Instruction-Level Parallelism; ...
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| Language: | eng |
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| Published: |
Morgan Kaufmann,
2007
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| Online Access: | https://dlib.udn.vn/module/chi-tiet-sach?RecordID=1996 |
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| Institutions: | Trung tâm Công nghệ thông tin và Học liệu số, Đại học Đà Nẵng |
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https:--dlib.udn.vn-module-chi-tiet-sach?RecordID=19962025-04-21T00:00:00ZComputer architecture :Morgan Kaufmann,2007.Chapter 1: Fundamentals of Computer Design; Chapter 2: Instruction-Level Parallelism and Its Exploitation; Chapter 3: Limits on Instruction-Level Parallelism; ...engComputer architecture.https://dlib.udn.vn/module/chi-tiet-sach?RecordID=1996 |
| institution |
Trung tâm Công nghệ thông tin và Học liệu số, Đại học Đà Nẵng |
| collection |
DSpace |
| language |
eng |
| topic |
Computer architecture. |
| spellingShingle |
Computer architecture. Computer architecture : |
| description |
Chapter 1: Fundamentals of Computer Design; Chapter 2: Instruction-Level Parallelism and Its Exploitation; Chapter 3: Limits on Instruction-Level Parallelism; ... |
| title |
Computer architecture : |
| title_short |
Computer architecture : |
| title_full |
Computer architecture : |
| title_fullStr |
Computer architecture : |
| title_full_unstemmed |
Computer architecture : |
| title_sort |
computer architecture : |
| publisher |
Morgan Kaufmann, |
| publishDate |
2007 |
| url |
https://dlib.udn.vn/module/chi-tiet-sach?RecordID=1996 |
| _version_ |
1848656404446969856 |