A framework for customizable deep neural network hardware generation on FPGA
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| 言語: | vie |
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| オンライン・アクセス: | https://dlib.udn.vn/module/chi-tiet-sach?RecordID=8647 |
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| Thư viện lưu trữ: | Trung tâm Công nghệ thông tin và Học liệu số, Đại học Đà Nẵng |
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