Truong, Q. D., Duong, N. P., & Lee, H. (2024). Efficient Low-Latency Hardware Architecture for Module-Lattice-Based Digital Signature Standard. IEEE.
Chicago ZitierstilTruong, Quang Dang, Ngoc Phap Duong, und Hanho Lee. Efficient Low-Latency Hardware Architecture for Module-Lattice-Based Digital Signature Standard. IEEE, 2024.
MLA ZitierstilTruong, Quang Dang, Ngoc Phap Duong, und Hanho Lee. Efficient Low-Latency Hardware Architecture for Module-Lattice-Based Digital Signature Standard. IEEE, 2024.
Achtung: Diese Zitate sind unter Umständen nicht zu 100% korrekt.