Truong, Q. D., Duong, N. P., & Lee, H. (2024). Efficient Low-Latency Hardware Architecture for Module-Lattice-Based Digital Signature Standard. IEEE.
Chicago Style CitationTruong, Quang Dang, Ngoc Phap Duong, and Hanho Lee. Efficient Low-Latency Hardware Architecture for Module-Lattice-Based Digital Signature Standard. IEEE, 2024.
MLA CitationTruong, Quang Dang, Ngoc Phap Duong, and Hanho Lee. Efficient Low-Latency Hardware Architecture for Module-Lattice-Based Digital Signature Standard. IEEE, 2024.
Warning: These citations may not always be 100% accurate.