Truong, Q. D., Duong, N. P., & Lee, H. (2024). Efficient Low-Latency Hardware Architecture for Module-Lattice-Based Digital Signature Standard. IEEE.
Style de citation ChicagoTruong, Quang Dang, Ngoc Phap Duong, et Hanho Lee. Efficient Low-Latency Hardware Architecture for Module-Lattice-Based Digital Signature Standard. IEEE, 2024.
Style de citation MLATruong, Quang Dang, Ngoc Phap Duong, et Hanho Lee. Efficient Low-Latency Hardware Architecture for Module-Lattice-Based Digital Signature Standard. IEEE, 2024.
Attention : ces citations peuvent ne pas être correctes à 100%.