Truong, Q. D., Duong, N. P., & Lee, H. (2024). Efficient Low-Latency Hardware Architecture for Module-Lattice-Based Digital Signature Standard. IEEE.
Trích dẫn kiểu ChicagoTruong, Quang Dang, Ngoc Phap Duong, và Hanho Lee. Efficient Low-Latency Hardware Architecture for Module-Lattice-Based Digital Signature Standard. IEEE, 2024.
MLA引文Truong, Quang Dang, Ngoc Phap Duong, và Hanho Lee. Efficient Low-Latency Hardware Architecture for Module-Lattice-Based Digital Signature Standard. IEEE, 2024.
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