Open Verification Methodology Cookbook

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Open Verification Methodology Cookbook

Đã lưu trong:

Sonraí Bibleagrafaíochta
Príomhúdar:	Glasser, Mark
Formáid:	Leabhar
Teanga:	English
Foilsithe:	Springer New York 2020
Ábhair:	Engineering Circuits and Systems Computer-Aided Engineering (CAD, CAE) and Design
Rochtain Ar Líne:	https://scholar.dlu.edu.vn/thuvienso/handle/DLU123456789/85323
Clibeanna:	Cuir Clib Leis Gan Chlibeanna, Bí ar an gcéad duine leis an taifead seo a chlibeáil!

Thư viện lưu trữ:	Thư viện Trường Đại học Đà Lạt

Míreanna Comhchosúla

Standardized Functional Verification
le: Wiemann, Alan
Foilsithe: (2020)

Hardware Verification with System Verilog
le: Mintz, Mike, et al.
Foilsithe: (2020)

Functional Verification Coverage Measurement and Analysis
le: Piziali, Andrew
Foilsithe: (2020)

SystemVerilog for Verification
le: Spear, Chris
Foilsithe: (2020)

Routing Congestion in VLSI Circuits
le: Saxena, Prashant, et al.
Foilsithe: (2020)

Rapid Prototyping of Digital Systems
le: Hamblen, James O., et al.
Foilsithe: (2020)

Embedded System Design
le: Gajski, Daniel D., et al.
Foilsithe: (2020)

Nanosystems Design and Technology
le: DeMicheli, Giovanni, et al.
Foilsithe: (2020)

Full-Chip Nanometer Routing Techniques
le: Ho, Tsung-Yi, et al.
Foilsithe: (2020)

Functional Design Errors in Digital Circuits
le: Chang, Kai-hui, et al.
Foilsithe: (2020)

Systematic Methodology for Real-Time Cost-Effective Mapping of Dynamic Concurrent Task-Based Systems on Heterogenous Platforms
le: Ma, Zhe, et al.
Foilsithe: (2020)

DRM, a Design Research Methodology
le: Blessing, Lucienne T.M., et al.
Foilsithe: (2020)

Timing Optimization Through Clock Skew Scheduling
le: Kourtev, Ivan S., et al.
Foilsithe: (2020)

Clocking in Modern VLSI Systems
le: Xanthopoulos, Thucydides
Foilsithe: (2020)

Creating Assertion-Based IP
le: Foster, Harry D., et al.
Foilsithe: (2020)

Assertion-Based Design
le: Foster, Harry D., et al.
Foilsithe: (2020)

Digital Design and Implementation with Field Programmable Devices
le: Navabi, Zainalabedin
Foilsithe: (2020)

Collaborative Product Design and Manufacturing Methodologies and Applications
le: Li, Wei Dong, et al.
Foilsithe: (2020)

Verilog and SystemVerilog Gotchas
le: Sutherland, Stuart, et al.
Foilsithe: (2020)

Global Specification and Validation of Embedded Systems
le: Nicolescu, G., et al.
Foilsithe: (2020)

CMOS Active Inductors and Transformers
le: Yuan, Fei
Foilsithe: (2020)

Closing the Power Gap between ASIC & Custom
le: Chinnery, David, et al.
Foilsithe: (2020)

Inverse Problems in Electric Circuits and Electromagnetics
le: Korovkin, N.V., et al.
Foilsithe: (2020)

Automated Technology for Verification and Analysis
le: Peled, Doron A., et al.
Foilsithe: (2020)

Automated Technology for Verification and Analysis
le: Namjoshi, Kedar, et al.
Foilsithe: (2020)

Design for Manufacturability and Statistical Design
le: Orshansky, Michael, et al.
Foilsithe: (2020)

Solid Modeling and Applications
le: Um, Dugan
Foilsithe: (2020)

Models for Computer Aided Tolerancing in Design and Manufacturing
le: Davidson, Joseph K.
Foilsithe: (2020)

Millimeter-Wave Low Noise Amplifiers. 1st ed. 2018
le: Božanić, Mladen, et al.
Foilsithe: (2020)

Design for Manufacturability and Yield for Nano-Scale CMOS
le: Chiang, Charles, et al.
Foilsithe: (2020)

CMOS Current-Mode Circuits for Data Communications
le: Yuan, Fei
Foilsithe: (2020)

Nanometer Technology Designs
le: Ahmed, Nisar
Foilsithe: (2020)

Low-Power High-Level Synthesis for Nanoscale CMOS Circuits
le: Mohanty, Saraju P., et al.
Foilsithe: (2020)

Carbon Nanotube Electronics
le: Javey, Ali, et al.
Foilsithe: (2020)

Static Timing Analysis for Nanometer Designs
le: Bhasker, J., et al.
Foilsithe: (2020)

Advances in Ergonomics of Manufacturing: Managing the Enterprise of the Future. 1st ed. 2018
le: Trzcielinski, Stefan
Foilsithe: (2020)

Computational Morphologies. 1st ed. 2018
le: Rossi, Michela, et al.
Foilsithe: (2020)

The Universal Generating Function in Reliability Analysis and Optimization
le: Levitin, Gregory
Foilsithe: (2020)

Design Computing and Cognition '08
le: Gero, John S., et al.
Foilsithe: (2020)

Backward Fuzzy Rule Interpolation
le: Jin, Shangzhu, et al.
Foilsithe: (2019)