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| LEADER |
01558cmm a2200421 a 4500 |
| 001 |
000043259 |
| 003 |
1197 |
| 005 |
20060111142740.0 |
| 008 |
010217b2003 vm 000 eng |
| 020 |
|
|
|a 0072835257
|
| 040 |
|
|
|a LRC
|c LRC
|d LRC
|
| 041 |
0 |
|
|a eng
|
| 082 |
1 |
4 |
|a 621.392
|2 21
|b BR-S
|
| 100 |
1 |
|
|a Brown, Stephen D.
|
| 245 |
1 |
0 |
|a Max+Plus II software and design examples to accompany fundamentals of digital logic with verilog design
|h [Computer file - Đĩa máy tính] /
|c Stephen D. Brown, Zvonko Vranesic.
|
| 246 |
3 |
3 |
|a Fundamentals of digital logic with verilog design.
|
| 260 |
|
|
|a Boston MA :
|b McGraw-Hill,
|c 2003.
|
| 300 |
|
|
|a 1 computer disc ;
|c 4 3/4 in. +
|e 1 book (xx, 844 p. :
|b ill. ;
|c 23 cm.).
|
| 500 |
|
|
|a Title from container.
|
| 630 |
0 |
4 |
|a Logic circuits.
|
| 630 |
0 |
4 |
|a Logic design.
|
| 630 |
0 |
4 |
|a Verilog.
|
| 650 |
0 |
4 |
|a Logic circuits
|x Design and construction
|x Data processing.
|
| 650 |
0 |
4 |
|a Verilog (Computer hardware description language)
|
| 650 |
0 |
4 |
|a Computer-aided design.
|
| 700 |
1 |
|
|a Vranesic, Zvonko G.
|
| OWN |
|
|
|a DUT
|
| AVA |
|
|
|a UDN50
|b DUT
|c Visual
|d 621.392 BR-S
|e available
|t Error 5001 Not defined in file expand_doc_bib_avail.
|f 1
|g 0
|h N
|i 0
|j AV
|k 1
|
| 999 |
|
|
|a From the UDN01
|
| AVA |
|
|
|a UDN50
|b DUT
|c Visual
|d 621.392 BR-S
|e available
|t Error 5001 Not defined in file expand_doc_bib_avail.
|f 1
|g 0
|h N
|i 0
|j AV
|k 1
|
| TYP |
|
|
|a Computer file
|
| TYP |
|
|
|a Monograph
|
| 980 |
|
|
|a Mạng thư viện Đại học Đà Nẵng
|
