Nanoscale CMOS VLSI circuits design for manufacturability
This detailed guide offers proven methods for optimizing circuit designs to increase the yield, reliability, and manufacturability of products and mitigate defects and failure. Covering the latest devices, technologies, and processes, Nanoscale CMOS VLSI Circuits: Design for Manufacturability focuse...
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Ngôn ngữ: | Undetermined English |
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New York
McGraw-Hill
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Thư viện lưu trữ: | Trung tâm Học liệu Trường Đại học Trà Vinh |
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LEADER | 01263nam a2200277Ia 4500 | ||
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001 | TVU_20015 | ||
008 | 210423s9999 xx 000 0 und d | ||
020 | |a 007163519X | ||
020 | |a 9780071635196 | ||
041 | |a eng | ||
082 | |a 621.395 | ||
082 | |b K512 | ||
100 | |a Kundu, Sandip | ||
245 | 0 | |a Nanoscale CMOS VLSI circuits | |
245 | 0 | |b design for manufacturability | |
245 | 0 | |c Sandip Kundu, Aswin Sreedhar | |
260 | |a New York | ||
260 | |b McGraw-Hill | ||
300 | |a xv, 296 p. | ||
300 | |b ill. | ||
300 | |c 24 cm | ||
504 | |a Includes bibliographical references and index | ||
520 | |a This detailed guide offers proven methods for optimizing circuit designs to increase the yield, reliability, and manufacturability of products and mitigate defects and failure. Covering the latest devices, technologies, and processes, Nanoscale CMOS VLSI Circuits: Design for Manufacturability focuses on delivering higher performance and lower power consumption. Costs, constraints, and computational efficiencies are also discussed in the practical resource | ||
650 | |a Metal oxide semiconductors; Complementary; Integrated circuits; Nanoelectronics | ||
700 | |a Sandip Kundu; Aswin Sreedhar | ||
980 | |a Trung tâm Học liệu Trường Đại học Trà Vinh |