High-level Estimation and Exploration of Reliability for Multi-Processor System-on-Chip. 1st ed. 2018

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Chi tiết về thư mục
Những tác giả chính: Wang, Zheng, Chattopadhyay, Anupam
Định dạng: Sách
Ngôn ngữ:English
Được phát hành: Springer Singapore 2020
Những chủ đề:
Truy cập trực tuyến:http://doi.org/10.1007/978-981-10-1073-6
https://scholar.dlu.edu.vn/thuvienso/handle/DLU123456789/102328
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spelling oai:scholar.dlu.edu.vn:DLU123456789-1023282023-10-06T12:30:37Z High-level Estimation and Exploration of Reliability for Multi-Processor System-on-Chip. 1st ed. 2018 Wang, Zheng Chattopadhyay, Anupam Engineering Circuits and Systems Performance and Reliability Electronic Circuits and Devices 2020-09-11T12:40:45Z 2020-09-11T12:40:45Z 2018 Book 978-981-10-1072-9 978-981-10-1073-6 http://doi.org/10.1007/978-981-10-1073-6 https://scholar.dlu.edu.vn/thuvienso/handle/DLU123456789/102328 en Computer Architecture and Design Methodologies Springer Science+Business Media Singapore application/pdf Springer Singapore
institution Thư viện Trường Đại học Đà Lạt
collection Thư viện số
language English
topic Engineering
Circuits and Systems
Performance and Reliability
Electronic Circuits and Devices
spellingShingle Engineering
Circuits and Systems
Performance and Reliability
Electronic Circuits and Devices
Wang, Zheng
Chattopadhyay, Anupam
High-level Estimation and Exploration of Reliability for Multi-Processor System-on-Chip. 1st ed. 2018
format Book
author Wang, Zheng
Chattopadhyay, Anupam
author_facet Wang, Zheng
Chattopadhyay, Anupam
author_sort Wang, Zheng
title High-level Estimation and Exploration of Reliability for Multi-Processor System-on-Chip. 1st ed. 2018
title_short High-level Estimation and Exploration of Reliability for Multi-Processor System-on-Chip. 1st ed. 2018
title_full High-level Estimation and Exploration of Reliability for Multi-Processor System-on-Chip. 1st ed. 2018
title_fullStr High-level Estimation and Exploration of Reliability for Multi-Processor System-on-Chip. 1st ed. 2018
title_full_unstemmed High-level Estimation and Exploration of Reliability for Multi-Processor System-on-Chip. 1st ed. 2018
title_sort high-level estimation and exploration of reliability for multi-processor system-on-chip. 1st ed. 2018
publisher Springer Singapore
publishDate 2020
url http://doi.org/10.1007/978-981-10-1073-6
https://scholar.dlu.edu.vn/thuvienso/handle/DLU123456789/102328
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