Microarchitecture of Network-on-Chip Routers (A Designer’s Perspective)
Modern computing devices, ranging from smartphones and tablets up to powerful servers, rely on complex silicon chips that integrate inside them hundreds or thousands of processing elements. The design of such systems is not an easy task. Efficient design methodologies are needed that would organi...
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| Những tác giả chính: | , , |
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| Định dạng: | Sách |
| Ngôn ngữ: | English |
| Được phát hành: |
Springer
2015
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| Những chủ đề: | |
| Truy cập trực tuyến: | https://scholar.dlu.edu.vn/thuvienso/handle/DLU123456789/56967 |
| Các nhãn: |
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| Thư viện lưu trữ: | Thư viện Trường Đại học Đà Lạt |
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| Tóm tắt: | Modern computing devices, ranging from smartphones and tablets up to powerful
servers, rely on complex silicon chips that integrate inside them hundreds or
thousands of processing elements. The design of such systems is not an easy task.
Efficient design methodologies are needed that would organize the designer’s work
and reduce the risk for a low-efficiency system. One of the main challenges that
the designer faces is how to connect the components inside the silicon chip, both
physically and logically, without compromising performance. The network-on-chip
(NoC) paradigm tries to answer this question by applying at the silicon chip level
well established networking principles, after suitably adapting them to the silicon
chip characteristics and to application demands. The routers are the heart and
the backbone of the NoC. Their main function is to route data from source to
destination, while they provide arbitrary connectivity between several inputs and
outputs that allows the implementation of arbitrary network topologies... |
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