Power-Efficient High-Speed Parallel-Sampling ADCs for Broadband Multi-carrier Systems
This book addresses the challenges of designing high performance analog-to-digital converters (ADCs) based on the “smart data converters” concept, which implies context awareness, on-chip intelligence and adaptation. Readers will learn to exploit various information either a-priori or a-posteriori (...
Wedi'i Gadw mewn:
| Prif Awduron: | , , |
|---|---|
| Fformat: | Llyfr |
| Iaith: | English |
| Cyhoeddwyd: |
Springer
2015
|
| Pynciau: | |
| Mynediad Ar-lein: | https://scholar.dlu.edu.vn/thuvienso/handle/DLU123456789/58849 |
| Tagiau: |
Ychwanegu Tag
Dim Tagiau, Byddwch y cyntaf i dagio'r cofnod hwn!
|
| Thư viện lưu trữ: | Thư viện Trường Đại học Đà Lạt |
|---|
| Crynodeb: | This book addresses the challenges of designing high performance analog-to-digital converters (ADCs) based on the “smart data converters” concept, which implies context awareness, on-chip intelligence and adaptation. Readers will learn to exploit various information either a-priori or a-posteriori (obtained from devices, signals, applications or the ambient situations, etc.) for circuit and architecture optimization during the design phase or adaptation during operation, to enhance data converters performance, flexibility, robustness and power-efficiency. The authors focus on exploiting the a-priori knowledge of the system/application to develop enhancement techniques for ADCs, with particular emphasis on improving the power efficiency of high-speed and high-resolution ADCs for broadband multi-carrier systems. |
|---|