Statistical Analysis and Optimization for VLSI: Timing and Power

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Những tác giả chính: Srivastava, Ashish, Sylvester, Dennis, Blaauw, David
Định dạng: Sách
Ngôn ngữ:English
Được phát hành: Springer US 2020
Những chủ đề:
Truy cập trực tuyến:https://scholar.dlu.edu.vn/thuvienso/handle/DLU123456789/84998
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spelling oai:scholar.dlu.edu.vn:DLU123456789-849982023-10-06T05:16:38Z Statistical Analysis and Optimization for VLSI: Timing and Power Srivastava, Ashish Sylvester, Dennis Blaauw, David Engineering Circuits and Systems Electronics and Microelectronics, Instrumentation 2020-02-24T10:21:57Z 2020-02-24T10:21:57Z 2005 Book 978-0-387-25738-9 978-0-387-26528-5 https://scholar.dlu.edu.vn/thuvienso/handle/DLU123456789/84998 en Integrated Circuits and Systems Springer-Verlag US application/pdf Springer US
institution Thư viện Trường Đại học Đà Lạt
collection Thư viện số
language English
topic Engineering
Circuits and Systems
Electronics and Microelectronics, Instrumentation
spellingShingle Engineering
Circuits and Systems
Electronics and Microelectronics, Instrumentation
Srivastava, Ashish
Sylvester, Dennis
Blaauw, David
Statistical Analysis and Optimization for VLSI: Timing and Power
format Book
author Srivastava, Ashish
Sylvester, Dennis
Blaauw, David
author_facet Srivastava, Ashish
Sylvester, Dennis
Blaauw, David
author_sort Srivastava, Ashish
title Statistical Analysis and Optimization for VLSI: Timing and Power
title_short Statistical Analysis and Optimization for VLSI: Timing and Power
title_full Statistical Analysis and Optimization for VLSI: Timing and Power
title_fullStr Statistical Analysis and Optimization for VLSI: Timing and Power
title_full_unstemmed Statistical Analysis and Optimization for VLSI: Timing and Power
title_sort statistical analysis and optimization for vlsi: timing and power
publisher Springer US
publishDate 2020
url https://scholar.dlu.edu.vn/thuvienso/handle/DLU123456789/84998
_version_ 1819813567574048768