Optimized ASIP Synthesis from Architecture Description Language Models

Codi QR

Optimized ASIP Synthesis from Architecture Description Language Models

Guardat en:

Dades bibliogràfiques
Autors principals:	Schliebusch, Oliver, Meyr, Heinrich, Leupers, Rainer
Format:	Llibre
Idioma:	English
Publicat:	Springer Netherlands 2020
Matèries:	Engineering Circuits and Systems Processor Architectures Electronics and Microelectronics, Instrumentation
Accés en línia:	https://scholar.dlu.edu.vn/thuvienso/handle/DLU123456789/85122
Etiquetes:	Afegir etiqueta Sense etiquetes, Sigues el primer a etiquetar aquest registre!

Thư viện lưu trữ:	Thư viện Trường Đại học Đà Lạt

Ítems similars

High-Level Modeling and Synthesis of Analog Integrated Systems
per: Martens, Ewout S. J., et al.
Publicat: (2020)

Fundamentals of Computer Architecture and Design
per: Bindal, Ahmet
Publicat: (2020)

Design and Test Strategies for 2D/3D Integration for NoC-based Multicore Architectures
per: Manna, Kanchan, et al.
Publicat: (2020)

Automatic Analog IC Sizing and Optimization Constrained with PVT Corners and Layout Effects
per: Lourenço, Nuno, et al.
Publicat: (2020)

Transaction-Level Power Modeling
per: Darwish, Amr Baher, et al.
Publicat: (2020)

Languages, Design Methods, and Tools for Electronic System Design
per: Kazmierski, Tom J., et al.
Publicat: (2020)

Automatic Methods for the Refinement of System Models
per: Seiter, Julia, et al.
Publicat: (2020)

Model-Implementation Fidelity in Cyber Physical System Design
per: Molnos, Anca, et al.
Publicat: (2020)

Languages, Design Methods, and Tools for Electronic System Design. 1st ed. 2018
per: Fummi, Franco, et al.
Publicat: (2020)

Hardware Protection through Obfuscation
per: Forte, Domenic, et al.
Publicat: (2020)

Energy Efficient Embedded Video Processing Systems. 1st ed. 2018
per: Khan, Muhammad Usman Karim, et al.
Publicat: (2020)

System Verilog Assertions and Functional Coverage
per: Mehta, Ashok B.
Publicat: (2020)

Structured Analog CMOS Design
per: Stefanovic, Danica, et al.
Publicat: (2020)

Designing with Xilinx® FPGAs
per: Churiwala, Sanjay
Publicat: (2020)

Analog Integrated Circuit Design Automation
per: Martins, Ricardo, et al.
Publicat: (2020)

On-Chip Current Sensors for Reliable, Secure, and Low-Power Integrated Circuits
per: Bastos, Rodrigo Possamai, et al.
Publicat: (2020)

Foundations of Hardware IP Protection
per: Bossuet, Lilian, et al.
Publicat: (2020)

System-Scenario-based Design Principles and Applications
per: Catthoor, Francky, et al.
Publicat: (2020)

Contactless VLSI Measurement and Testing Techniques. 1st ed. 2018
per: Sayil, Selahattin
Publicat: (2020)

Embedded Systems Design with Special Arithmetic and Number Systems
per: Molahosseini, Amir Sabbagh, et al.
Publicat: (2020)

Hardware IP Security and Trust
per: Mishra, Prabhat, et al.
Publicat: (2020)

Formal System Verification. 1st ed. 2018
per: Drechsler, Rolf
Publicat: (2020)

System-on-Chip Security
per: Farahmandi, Farimah, et al.
Publicat: (2020)

Embedded System Design. 3rd ed. 2018
per: Marwedel, Peter
Publicat: (2020)

Hardware Security and Trust
per: Sklavos, Nicolas, et al.
Publicat: (2020)

Embedded Software Verification and Debugging
per: Lettnin, Djones, et al.
Publicat: (2020)

In-Memory Computing
per: Shirinzadeh, Saeideh, et al.
Publicat: (2020)

Digital Systems
per: Deschamps, Jean-Pierre, et al.
Publicat: (2020)

Handbook of Digital CMOS Technology, Circuits, and Systems
per: Abbas, Karim
Publicat: (2020)

Introduction to Reconfigurable Computing
per: Bobda, Christophe
Publicat: (2020)

Parallel Sparse Direct Solver for Integrated Circuit Simulation
per: Chen, Xiaoming, et al.
Publicat: (2020)

Ageing of Integrated Circuits
per: Halak, Basel
Publicat: (2020)

Introduction to Embedded Systems
per: Jiménez, Manuel, et al.
Publicat: (2020)

Heterogeneous Memory Organizations in Embedded Systems
per: Quirós, Miguel Peón, et al.
Publicat: (2020)

Language-driven Exploration and Implementation of Partially Re-configurable ASIPs
per: Chattopadhyay, Anupam, et al.
Publicat: (2020)

Deep In-memory Architectures for Machine Learning
per: Kang, Mingu, et al.
Publicat: (2020)

Simulation and Optimization of Digital Circuits
per: Melikyan, Vazgen
Publicat: (2020)

Emerging Technology and Architecture for Big-data Analytics
per: Chattopadhyay, Anupam, et al.
Publicat: (2020)

High-Level Synthesis
per: Coussy, Philippe, et al.
Publicat: (2020)

Automated Validation & Verification of UML/OCL Models Using Satisfiability Solvers
per: Przigoda, Nils, et al.
Publicat: (2020)