Formal Verification of Simulink/Stateflow Diagrams

Côd QR

Formal Verification of Simulink/Stateflow Diagrams

Wedi'i Gadw mewn:

Manylion Llyfryddiaeth
Prif Awduron:	Zhan, Naijun, Wang, Shuling, Zhao, Hengjun
Fformat:	Llyfr
Iaith:	English
Cyhoeddwyd:	Springer International Publishing 2020
Pynciau:	Engineering Circuits and Systems Processor Architectures Electronic Circuits and Devices
Mynediad Ar-lein:	https://scholar.dlu.edu.vn/thuvienso/handle/DLU123456789/85873
Tagiau:	Ychwanegu Tag Dim Tagiau, Byddwch y cyntaf i dagio'r cofnod hwn!

Thư viện lưu trữ:	Thư viện Trường Đại học Đà Lạt

Eitemau Tebyg

Formal System Verification. 1st ed. 2018
gan: Drechsler, Rolf
Cyhoeddwyd: (2020)

Invasive Computing for Mapping Parallel Programs to Many-Core Architectures. 1st ed. 2018
gan: Weichslgartner, Andreas, et al.
Cyhoeddwyd: (2020)

Energy-Efficient Smart Temperature Sensors in CMOS Technology. 1st ed. 2018
gan: Souri, Kamran, et al.
Cyhoeddwyd: (2020)

Neuro-inspired Computing Using Resistive Synaptic Devices
gan: Yu, Shimeng
Cyhoeddwyd: (2020)

Circadian Rhythms for Future Resilient Electronic Systems
gan: Guo, Xinfei, et al.
Cyhoeddwyd: (2020)

Carbon Nanotubes for Interconnects
gan: Todri-Sanial, Aida, et al.
Cyhoeddwyd: (2020)

CMOS Circuits for Biological Sensing and Processing. 1st ed. 2018
gan: Mitra, Srinjoy, et al.
Cyhoeddwyd: (2020)

Hybrid ADCs, Smart Sensors for the IoT, and Sub-1V & Advanced Node Analog Circuit Design. 1st ed. 2018
gan: Harpe, Pieter, et al.
Cyhoeddwyd: (2020)

More-than-Moore 2.5D and 3D SiP Integration
gan: Radojcic, Riko
Cyhoeddwyd: (2020)

The Dark Side of Silicon
gan: Rahmani, Amir M., et al.
Cyhoeddwyd: (2020)

Electromigration Inside Logic Cells
gan: Posser, Gracieli, et al.
Cyhoeddwyd: (2020)

Emerging Technology and Architecture for Big-data Analytics
gan: Chattopadhyay, Anupam, et al.
Cyhoeddwyd: (2020)

Embedded Flash Memory for Embedded Systems: Technology, Design for Sub-systems, and Innovations. 1st ed. 2018
gan: Hidaka, Hideto
Cyhoeddwyd: (2020)

Fundamentals of IP and SoC Security
gan: Bhunia, Swarup, et al.
Cyhoeddwyd: (2020)

Brain-Machine Interface. 1st ed. 2018
gan: Liu, Xilin, et al.
Cyhoeddwyd: (2020)

The Fourth Terminal. 1st ed.
gan: Clerc, Sylvain, et al.
Cyhoeddwyd: (2020)

Operational Amplifiers
gan: Huijsing, Johan
Cyhoeddwyd: (2020)

Automated Validation & Verification of UML/OCL Models Using Satisfiability Solvers
gan: Przigoda, Nils, et al.
Cyhoeddwyd: (2020)

Embedded Software Verification and Debugging
gan: Lettnin, Djones, et al.
Cyhoeddwyd: (2020)

Low-Power Design and Power-Aware Verification. 1st ed. 2018
gan: Khondkar, Progyna
Cyhoeddwyd: (2020)

New Data Structures and Algorithms for Logic Synthesis and Verification
gan: Amaru, Luca Gaetano
Cyhoeddwyd: (2020)

ASIC/SoC Functional Design Verification. 1st ed. 2018
gan: Mehta, Ashok B.
Cyhoeddwyd: (2020)

Functional Verification of Programmable Embedded Architectures
gan: Mishra, Prabhat, et al.
Cyhoeddwyd: (2020)

Circuit and Interconnect Design for RF and High Bit-rate Applications
gan: Veenstra, Hugo, et al.
Cyhoeddwyd: (2020)

Timing Performance of Nanometer Digital Circuits Under Process Variations
gan: Champac, Victor, et al.
Cyhoeddwyd: (2020)

Design Techniques for Mash Continuous-Time Delta-Sigma Modulators
gan: Liu, Qiyuan, et al.
Cyhoeddwyd: (2020)

Data-Driven Modeling of Cyber-Physical Systems using Side-Channel Analysis
gan: Chhetri, Sujit Rokka, et al.
Cyhoeddwyd: (2020)

Reliable and Energy Efficient Streaming Multiprocessor Systems
gan: Das, Anup Kumar, et al.
Cyhoeddwyd: (2020)

Simulation and Optimization of Digital Circuits
gan: Melikyan, Vazgen
Cyhoeddwyd: (2020)

Trusted Digital Circuits
gan: Salmani, Hassan
Cyhoeddwyd: (2020)

Physically Unclonable Functions
gan: Halak, Basel
Cyhoeddwyd: (2020)

Deep In-memory Architectures for Machine Learning
gan: Kang, Mingu, et al.
Cyhoeddwyd: (2020)

Energy Efficient High Performance Processors
gan: Haj-Yahya, Jawad, et al.
Cyhoeddwyd: (2020)

Analog Circuit Design
gan: Steyaert, Michiel, et al.
Cyhoeddwyd: (2020)

Adaptive Digital Circuits for Power-Performance Range beyond Wide Voltage Scaling
gan: Jain, Saurabh, et al.
Cyhoeddwyd: (2020)

Symbolic Parallelization of Nested Loop Programs
gan: Tanase, Alexandru-Petru, et al.
Cyhoeddwyd: (2020)

Advanced Techniques for Power, Energy, and Thermal Management for Clustered Manycores
gan: Pagani, Santiago, et al.
Cyhoeddwyd: (2020)

Applied formal verification
gan: Perry, Douglas L.
Cyhoeddwyd: (2005)

Parallel Sparse Direct Solver for Integrated Circuit Simulation
gan: Chen, Xiaoming, et al.
Cyhoeddwyd: (2020)

Hardware Protection through Obfuscation
gan: Forte, Domenic, et al.
Cyhoeddwyd: (2020)