Giáo trình thực hành thiết kế vi mạch số với VHDL

TM tài liệu tham khảo tr.446; Trình bày nội dung về cấu hình kit FPGA, hướng dẫn sử dụng phần mềm lập trình, thiết kế mạch tổ hợp, thiết kế mạch tuần tự 1,2,3, thiết kế mạch giao tiếp bộ nhớ RAM bằng VHDL, giao tiếp truyền dữ liệu...

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Manylion Llyfryddiaeth
Prif Awdur:	Nguyễn, Đình Phú
Awduron Eraill:	Trương, Thị Bích Ngà
Fformat:	Llyfr
Iaith:	Undetermined
Cyhoeddwyd:	Tp. Hồ Chí Minh. Đại học Quốc gia TP.HCM 2018
Pynciau:	VHDL (Ngôn ngữ mô tả phần cứng máy vi tính); Vi mạch số > Thiết kế và lắp ráp > Giáo trình
Mynediad Ar-lein:	http://lrc.tdmu.edu.vn/opac/search/detail.asp?aID=2&ID=32582
Tagiau:	Ychwanegu Tag Dim Tagiau, Byddwch y cyntaf i dagio'r cofnod hwn!

Thư viện lưu trữ:	Trung tâm Học liệu Trường Đại học Thủ Dầu Một

Rhyngrwyd

http://lrc.tdmu.edu.vn/opac/search/detail.asp?aID=2&ID=32582

Giáo trình thực hành thiết kế vi mạch số với VHDL

Rhyngrwyd

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