Efficient Low-Latency Hardware Architecture for Module-Lattice-Based Digital Signature Standard

Efficient Low-Latency Hardware Architecture for Module-Lattice-Based Digital Signature Standard

IEEE Access, Vol 12; pp: 32395-32407.

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Bibliographic Details
Main Authors: Truong, Quang Dang, Duong, Ngoc Phap, Lee, Hanho
Format: Bài viết
Language:Vietnamese
Published: IEEE 2024
Subjects:
Post-quantum cryptography (PQC)
module-lattice-based digital signature standard (ML-DSA)
crystals-Dilithium
lattice-based cryptography (LBC)
number theoretic transform (NTT)
Online Access:https://elib.vku.udn.vn/handle/123456789/4013
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Institutions: Trường Đại học Công nghệ Thông tin và Truyền thông Việt Hàn - Đại học Đà Nẵng

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https://elib.vku.udn.vn/handle/123456789/4013

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