Phase-locked loop synthesizer simulation
Phase locked loops (PLLs) are electronic circuits that ensure that a communications signal stays locked on a given frequency. Their design is crucial to the workings of wireless communications systems. Virtually all transceivers use PLLs to synthesize the stable, high frequency oscillations necessar...
Wedi'i Gadw mewn:
Prif Awdur: | Bianchi, Giovanni |
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Fformat: | Llyfr |
Iaith: | Undetermined |
Cyhoeddwyd: |
New York
McGraw-Hill
2005
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Pynciau: | |
Tagiau: |
Ychwanegu Tag
Dim Tagiau, Byddwch y cyntaf i dagio'r cofnod hwn!
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Thư viện lưu trữ: | Trung tâm Học liệu Trường Đại học Cần Thơ |
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