Phase-locked loop synthesizer simulation
Phase locked loops (PLLs) are electronic circuits that ensure that a communications signal stays locked on a given frequency. Their design is crucial to the workings of wireless communications systems. Virtually all transceivers use PLLs to synthesize the stable, high frequency oscillations necessar...
Zapisane w:
| 1. autor: | |
|---|---|
| Format: | Książka |
| Język: | Undetermined |
| Wydane: |
New York
McGraw-Hill
2005
|
| Hasła przedmiotowe: | |
| Etykiety: |
Dodaj etykietę
Nie ma etykietki, Dołącz pierwszą etykiete!
|
| Thư viện lưu trữ: | Trung tâm Học liệu Trường Đại học Cần Thơ |
|---|
Napisz pierwszy komentarz!