Phase-locked loop synthesizer simulation
Phase locked loops (PLLs) are electronic circuits that ensure that a communications signal stays locked on a given frequency. Their design is crucial to the workings of wireless communications systems. Virtually all transceivers use PLLs to synthesize the stable, high frequency oscillations necessar...
محفوظ في:
المؤلف الرئيسي: | Bianchi, Giovanni |
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التنسيق: | كتاب |
اللغة: | Undetermined |
منشور في: |
New York
McGraw-Hill
2005
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الموضوعات: | |
الوسوم: |
إضافة وسم
لا توجد وسوم, كن أول من يضع وسما على هذه التسجيلة!
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Thư viện lưu trữ: | Trung tâm Học liệu Trường Đại học Cần Thơ |
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مواد مشابهة
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Phase-locked loop synthesizer simulation /
بواسطة: Bianchi, Giovanni.
منشور في: (2005) -
Phase-locked loop synthesizer simulation
بواسطة: Bianchi, Giovanni
منشور في: (2005) -
A Digital Phase Locked Loop based Signal and Symbol Recovery System for Wireless Channel
بواسطة: Purkayastha, Basab Bijoy, وآخرون
منشور في: (2015) -
Phase-locked loop synthesizer simulation
بواسطة: Bianchi, Giovanni.
منشور في: (2005) -
Catalytic enantioselective strecker reactions and analogous syntheses /
بواسطة: Groger, Harald.