Phase-locked loop synthesizer simulation

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Phase-locked loop synthesizer simulation

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Phase locked loops (PLLs) are electronic circuits that ensure that a communications signal stays locked on a given frequency. Their design is crucial to the workings of wireless communications systems. Virtually all transceivers use PLLs to synthesize the stable, high frequency oscillations necessar...

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書目詳細資料
主要作者:	Bianchi, Giovanni
格式:	圖書
語言:	Undetermined
出版:	New York McGraw-Hill 2005
主題:	Phase-locked loops,Frequency synthesizers,Vòng khóa pha,Bộ tổng hợp tần số Computer simulation,Sự mô phỏng trên máy tính
標簽:	添加標簽沒有標簽, 成為第一個標記此記錄!

Thư viện lưu trữ:	Trung tâm Học liệu Trường Đại học Cần Thơ

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