Phase-locked loop synthesizer simulation
Phase locked loops (PLLs) are electronic circuits that ensure that a communications signal stays locked on a given frequency. Their design is crucial to the workings of wireless communications systems. Virtually all transceivers use PLLs to synthesize the stable, high frequency oscillations necessar...
Αποθηκεύτηκε σε:
| Κύριος συγγραφέας: | Bianchi, Giovanni |
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| Μορφή: | Βιβλίο |
| Γλώσσα: | Undetermined |
| Έκδοση: |
New York
McGraw-Hill
2005
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| Θέματα: | |
| Ετικέτες: |
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| Thư viện lưu trữ: | Trung tâm Học liệu Trường Đại học Cần Thơ |
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Παρόμοια τεκμήρια
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Phase-locked loop synthesizer simulation /
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Έκδοση: (2005) -
Phase-locked loop synthesizer simulation
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Phase-locked loop synthesizer simulation
ανά: Bianchi, Giovanni.
Έκδοση: (2005) -
Catalytic enantioselective strecker reactions and analogous syntheses /
ανά: Groger, Harald.