Flip-Flop Design in Nanometer CMOS (From High Speed to Low Energy)
The design of the clocking subsystem represents a crucial aspect in CMOS VLSI integrated circuits, as it strongly affects not only the chip performance, but also its overall energy consumption. Independently of the nature of the system (fully synchronous, globally asynchronous, locally synchronou...
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oai:scholar.dlu.edu.vn:DLU123456789-561142023-11-11T05:32:22Z Flip-Flop Design in Nanometer CMOS (From High Speed to Low Energy) Alioto, Massimo Consoli, Elio Palumbo, Gaetano Cmos Computer The design of the clocking subsystem represents a crucial aspect in CMOS VLSI integrated circuits, as it strongly affects not only the chip performance, but also its overall energy consumption. Independently of the nature of the system (fully synchronous, globally asynchronous, locally synchronous), any clocking subsystem can be subdivided into three main parts: similar to the structure of a tree, the root is represented by the clock generation, the branches are represented by the circuits devoted to clock distribution, and the clocked storage elements (i.e., latches and/or flip-flops) are the final leaves. Flip-flops (or, more in general, clocked storage elements) are among the most important cells used in digital systems, such as microprocessors. They separate the various stages that pipelines are made up of, hold the state, and prevent early transitions that would be otherwise determined by fast paths. Overall, flip-flops synchronize and regulate the entire flow of data within a digital system... 2015-06-10T08:47:42Z 2015-06-10T08:47:42Z 2015 Book 978-3-319-01996-3 https://scholar.dlu.edu.vn/thuvienso/handle/DLU123456789/56114 en application/pdf Springer |
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Thư viện Trường Đại học Đà Lạt |
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English |
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Cmos Computer |
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Cmos Computer Alioto, Massimo Consoli, Elio Palumbo, Gaetano Flip-Flop Design in Nanometer CMOS (From High Speed to Low Energy) |
| description |
The design of the clocking subsystem represents a crucial aspect in CMOS VLSI
integrated circuits, as it strongly affects not only the chip performance, but also its
overall energy consumption. Independently of the nature of the system (fully
synchronous, globally asynchronous, locally synchronous), any clocking subsystem
can be subdivided into three main parts: similar to the structure of a tree, the
root is represented by the clock generation, the branches are represented by the
circuits devoted to clock distribution, and the clocked storage elements (i.e., latches
and/or flip-flops) are the final leaves. Flip-flops (or, more in general, clocked
storage elements) are among the most important cells used in digital systems, such
as microprocessors. They separate the various stages that pipelines are made up of,
hold the state, and prevent early transitions that would be otherwise determined by
fast paths. Overall, flip-flops synchronize and regulate the entire flow of data
within a digital system... |
| format |
Book |
| author |
Alioto, Massimo Consoli, Elio Palumbo, Gaetano |
| author_facet |
Alioto, Massimo Consoli, Elio Palumbo, Gaetano |
| author_sort |
Alioto, Massimo |
| title |
Flip-Flop Design
in Nanometer CMOS
(From High Speed to Low Energy) |
| title_short |
Flip-Flop Design
in Nanometer CMOS
(From High Speed to Low Energy) |
| title_full |
Flip-Flop Design
in Nanometer CMOS
(From High Speed to Low Energy) |
| title_fullStr |
Flip-Flop Design
in Nanometer CMOS
(From High Speed to Low Energy) |
| title_full_unstemmed |
Flip-Flop Design
in Nanometer CMOS
(From High Speed to Low Energy) |
| title_sort |
flip-flop design
in nanometer cmos
(from high speed to low energy) |
| publisher |
Springer |
| publishDate |
2015 |
| url |
https://scholar.dlu.edu.vn/thuvienso/handle/DLU123456789/56114 |
| _version_ |
1819777747963084800 |