Functional Verification of Dynamically Reconfigurable FPGA-based Systems
This book analyzes the challenges in verifying Dynamically Reconfigurable Systems (DRS) with respect to the user design and the physical implementation of such systems. The authors describe the use of a simulation-only layer to emulate the behavior of target FPGAs and accurately model the characteri...
Uloženo v:
| Hlavní autoři: | , |
|---|---|
| Médium: | Kniha |
| Jazyk: | English |
| Vydáno: |
Springer
2015
|
| On-line přístup: | https://scholar.dlu.edu.vn/thuvienso/handle/DLU123456789/57984 |
| Tagy: |
Přidat tag
Žádné tagy, Buďte první, kdo otaguje tento záznam!
|
| Thư viện lưu trữ: | Thư viện Trường Đại học Đà Lạt |
|---|
| Shrnutí: | This book analyzes the challenges in verifying Dynamically Reconfigurable Systems (DRS) with respect to the user design and the physical implementation of such systems. The authors describe the use of a simulation-only layer to emulate the behavior of target FPGAs and accurately model the characteristic features of reconfiguration. Readers are enabled with this simulation-only layer to maintain verification productivity by abstracting away the physical details of the FPGA fabric. Two implementations of the simulation-only layer are included: Extended Re Channel is a System C library that can be used to check DRS designs at a high level; ReSim is a library to support RTL simulation of a DRS reconfiguring both its logic and state. Through a number of case studies, the authors demonstrate how their approach integrates seamlessly with existing, mainstream DRS design flows and with well-established verification methodologies such as top-down modeling and coverage-driven verification. |
|---|