Wafer-Level Chip-Scale Packaging Analog and Power Semiconductor Applications
Analog and Power Wafer Level Chip Scale Packaging presents a state-of-art and in-depth overview in analog and power WLCSP design, material characterization, reliability and modeling. Recent advances in analog and power electronic WLCSP packaging are presented based on the development of analog techn...
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主要な著者: | , |
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フォーマット: | 図書 |
言語: | English |
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Springer
2015
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オンライン・アクセス: | https://scholar.dlu.edu.vn/thuvienso/handle/DLU123456789/59132 |
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Thư viện lưu trữ: | Thư viện Trường Đại học Đà Lạt |
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