Phase-locked loop synthesizer simulation

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Phase-locked loop synthesizer simulation

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Phase locked loops (PLLs) are electronic circuits that ensure that a communications signal stays locked on a given frequency. Their design is crucial to the workings of wireless communications systems. Virtually all transceivers use PLLs to synthesize the stable, high frequency oscillations necessar...

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Détails bibliographiques
Auteur principal:	Bianchi, Giovanni
Format:	Livre
Langue:	Undetermined
Publié:	New York McGraw-Hill 2005
Sujets:	Phase-locked loops,Frequency synthesizers,Vòng khóa pha,Bộ tổng hợp tần số Computer simulation,Sự mô phỏng trên máy tính
Tags:	Ajouter un tag Pas de tags, Soyez le premier à ajouter un tag!

Thư viện lưu trữ:	Trung tâm Học liệu Trường Đại học Cần Thơ

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