Phase-locked loop synthesizer simulation

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Phase-locked loop synthesizer simulation

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Phase locked loops (PLLs) are electronic circuits that ensure that a communications signal stays locked on a given frequency. Their design is crucial to the workings of wireless communications systems. Virtually all transceivers use PLLs to synthesize the stable, high frequency oscillations necessar...

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Opis bibliograficzny
1. autor:	Bianchi, Giovanni
Format:	Książka
Język:	Undetermined
Wydane:	New York McGraw-Hill 2005
Hasła przedmiotowe:	Phase-locked loops,Frequency synthesizers,Vòng khóa pha,Bộ tổng hợp tần số Computer simulation,Sự mô phỏng trên máy tính
Etykiety:	Dodaj etykietę Nie ma etykietki, Dołącz pierwszą etykiete!

Thư viện lưu trữ:	Trung tâm Học liệu Trường Đại học Cần Thơ

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