Phase-locked loop synthesizer simulation

Phase locked loops (PLLs) are electronic circuits that ensure that a communications signal stays locked on a given frequency. Their design is crucial to the workings of wireless communications systems. Virtually all transceivers use PLLs to synthesize the stable, high frequency oscillations necessar...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
1. Verfasser: Bianchi, Giovanni
Format: Buch
Sprache:Undetermined
Veröffentlicht: New York McGraw-Hill 2005
Schlagworte:
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Thư viện lưu trữ: Trung tâm Học liệu Trường Đại học Cần Thơ