Phase-locked loop synthesizer simulation
Phase locked loops (PLLs) are electronic circuits that ensure that a communications signal stays locked on a given frequency. Their design is crucial to the workings of wireless communications systems. Virtually all transceivers use PLLs to synthesize the stable, high frequency oscillations necessar...
保存先:
第一著者: | |
---|---|
フォーマット: | 図書 |
言語: | Undetermined |
出版事項: |
New York
McGraw-Hill
2005
|
主題: | |
タグ: |
タグ追加
タグなし, このレコードへの初めてのタグを付けませんか!
|
Thư viện lưu trữ: | Trung tâm Học liệu Trường Đại học Cần Thơ |
---|
このレコードへの初めてのコメントを付けませんか!