Logic synthesis and verification algorithms

Includes bibliographical references and index

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Détails bibliographiques
Auteur principal:	Hachtel, Gary D
Autres auteurs:	Somenzi, Fabio
Format:	Livre
Langue:	Undetermined
Publié:	New York Springer 2006
Sujets:	Integrated circuits > Very large scale integration > Design > Data processing; Logic design > Data processing; Mạch tích hợp > Thiết kế > Xử lý dữ liệu; Thiết kế logic > Xử lý dữ liệu
Accès en ligne:	http://lrc.tdmu.edu.vn/opac/search/detail.asp?aID=2&ID=35611
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Thư viện lưu trữ:	Trung tâm Học liệu Trường Đại học Thủ Dầu Một

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Logic synthesis and verification algorithms

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