Logic synthesis and verification algorithms

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Logic synthesis and verification algorithms

Includes bibliographical references and index

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Bibliografski detalji
Glavni autor:	Hachtel, Gary D
Daljnji autori:	Somenzi, Fabio
Format:	Knjiga
Jezik:	Undetermined
Izdano:	New York Springer 2006
Teme:	Integrated circuits > Very large scale integration > Design > Data processing; Logic design > Data processing; Mạch tích hợp > Thiết kế > Xử lý dữ liệu; Thiết kế logic > Xử lý dữ liệu
Online pristup:	http://lrc.tdmu.edu.vn/opac/search/detail.asp?aID=2&ID=35611
Oznake:	Dodaj oznaku Bez oznaka, Budi prvi tko označuje ovaj zapis!

Thư viện lưu trữ:	Trung tâm Học liệu Trường Đại học Thủ Dầu Một

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