Logic synthesis and verification algorithms

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Logic synthesis and verification algorithms

Includes bibliographical references and index

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書目詳細資料
主要作者:	Hachtel, Gary D
其他作者:	Somenzi, Fabio
格式:	圖書
語言:	Undetermined
出版:	New York Springer 2006
主題:	Integrated circuits > Very large scale integration > Design > Data processing; Logic design > Data processing; Mạch tích hợp > Thiết kế > Xử lý dữ liệu; Thiết kế logic > Xử lý dữ liệu
在線閱讀:	http://lrc.tdmu.edu.vn/opac/search/detail.asp?aID=2&ID=35611
標簽:	添加標簽沒有標簽, 成為第一個標記此記錄!

Thư viện lưu trữ:	Trung tâm Học liệu Trường Đại học Thủ Dầu Một

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