High Performance VLSI Architectures for QC-LDPC Codes in 5G Communications

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High Performance VLSI Architectures for QC-LDPC Codes in 5G Communications

Chapter1. Introduction; Chapter 2. Background and Fundamentals; Chapter 3. Low-Complexity Multi-Way Split-Row Layered LDPC Decoder for Gigabit Wireless Communications; ...

Wedi'i Gadw mewn:

Manylion Llyfryddiaeth
Prif Awdur:	Nguyen Thi Bao Tram
Iaith:	eng
Cyhoeddwyd:	Inha University
Mynediad Ar-lein:	https://dlib.udn.vn/module/chi-tiet-sach?RecordID=2892
Tagiau:	Ychwanegu Tag Dim Tagiau, Byddwch y cyntaf i dagio'r cofnod hwn!

Thư viện lưu trữ:	Trung tâm Công nghệ thông tin và Học liệu số, Đại học Đà Nẵng

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