Verification techniques for system-level design
This book will explain how to verify SoC logic designs using "formal" and "semi-formal" verification techniques. The critical issue to be addressed is whether the functionality of the design is the one that the designers intended. Simulation has been used for checking the correct...
में बचाया:
| मुख्य लेखक: | |
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| स्वरूप: | पुस्तक |
| भाषा: | Undetermined |
| प्रकाशित: |
Amsterdam
Morgan Kaufmann Publishers
2008
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| विषय: | |
| टैग : |
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| Thư viện lưu trữ: | Trung tâm Học liệu Trường Đại học Cần Thơ |
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