Verification techniques for system-level design

This book will explain how to verify SoC logic designs using "formal" and "semi-formal" verification techniques. The critical issue to be addressed is whether the functionality of the design is the one that the designers intended. Simulation has been used for checking the correct...

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Detaylı Bibliyografya
Yazar:	Fujita, Masahiro
Materyal Türü:	Kitap
Dil:	Undetermined
Baskı/Yayın Bilgisi:	Amsterdam Morgan Kaufmann Publishers 2008
Konular:	Integrated circuits,Formal methods (Computer science),Mạch tích hợp,Phương pháp hình thức (Khoa học máy tính),Systems on a chip,Hệ thống trên một chip Verification,Mã xác nhận,Testing,Thử nghiệm
Etiketler:	Etiketle Etiket eklenmemiş, İlk siz ekleyin!

Thư viện lưu trữ:	Trung tâm Học liệu Trường Đại học Cần Thơ

Verification techniques for system-level design

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