Verification techniques for system-level design

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Verification techniques for system-level design

This book will explain how to verify SoC logic designs using "formal" and "semi-formal" verification techniques. The critical issue to be addressed is whether the functionality of the design is the one that the designers intended. Simulation has been used for checking the correct...

Disgrifiad llawn

Wedi'i Gadw mewn:

Manylion Llyfryddiaeth
Prif Awdur:	Fujita, Masahiro
Fformat:	Llyfr
Iaith:	Undetermined
Cyhoeddwyd:	Amsterdam Morgan Kaufmann Publishers 2008
Pynciau:	Integrated circuits,Formal methods (Computer science),Mạch tích hợp,Phương pháp hình thức (Khoa học máy tính),Systems on a chip,Hệ thống trên một chip Verification,Mã xác nhận,Testing,Thử nghiệm
Tagiau:	Ychwanegu Tag Dim Tagiau, Byddwch y cyntaf i dagio'r cofnod hwn!

Thư viện lưu trữ:	Trung tâm Học liệu Trường Đại học Cần Thơ

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On-chip communication architectures : system on chip interconnect
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Electronic Assembly Fabrication /
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Multiprocessor systems on chips
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Designer's guide to the cypress psoc
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Formal Methods for Industrial Critical Systems: 20th International Workshop, FMICS 2015 Oslo, Norway, June 22-23, 2015 Proceedings
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Analysis and design of integrated circuits
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Analysis and design of integrated circuits
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Nghiên cứu thiết kế và tích hợp các chíp chuyên dụng vào hệ thống đo lường và thu thập dữ liệu
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Integrated circuit design
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Run-time security traceability for evolving systems /
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An introduction to mixed-signal IC test and measurement
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GTX 200 : Những chip đồ hoạ nguyên khối cao cấp cuối cùng /