Design and Modeling of Tunnel Field-Effect Transistors
Doctoral Thesis
Đã lưu trong:
| Tác giả chính: | |
|---|---|
| Tác giả khác: | |
| Định dạng: | Dissertation |
| Ngôn ngữ: | en_US |
| Được phát hành: |
National Chi Nan University
2023
|
| Những chủ đề: | |
| Truy cập trực tuyến: | https://scholar.dlu.edu.vn/thuvienso/handle/DLU123456789/115757 |
| Các nhãn: |
Thêm thẻ
Không có thẻ, Là người đầu tiên thẻ bản ghi này!
|
| Thư viện lưu trữ: | Thư viện Trường Đại học Đà Lạt |
|---|
| id |
oai:scholar.dlu.edu.vn:DLU123456789-115757 |
|---|---|
| record_format |
dspace |
| spelling |
oai:scholar.dlu.edu.vn:DLU123456789-1157572023-10-05T16:57:15Z Design and Modeling of Tunnel Field-Effect Transistors 穿隧電晶體之設計與模型 Nguyễn, Đăng Chiến Shih, Chun-Hsing Device design Analytical modeling Low bandgap semiconductor Low-power application Doctoral Thesis The insurmountable limit of 60 mV/decade subthreshold swing at room temperature in traditional metal-oxide-semiconductor field-effect transistors (MOSFETs) leads to the non-scalability of the threshold voltage and associated power consumption. Based on the gate-controlled band-to-band tunneling, tunnel field-effect transistors (TFETs) have demonstrated to overcome the MOSFET’s swing limit to serve as a promising candidate for energy-efficient applications. Using two-dimensional simulations with appropriate models and parameters, this dissertation explores the design and modeling of the advanced TFET devices to elucidate the physical mechanism, to optimize the operating characteristic, and to extend the potential scalability. Owing to the limitations of homojunction and abrupt heterojunction structures in on-current and short-channel effect, a new graded heterojunction approach is proposed to significantly boost the on-current and to further scale down the channel lengths of TFETs. The lowering of on-current observed in abrupt heterojunction TFETs is physically attributed to the thermal emission barriers formed by abrupt energy-band offsets. By employing graded heterojunctions, the thermal emission barriers for electrons/holes are completely eliminated to narrow the tunnel-barrier widths for enhancing the TFET current. With the bandgap engineering of graded heterojunctions, both the height and width of the tunnel barrier are highly controlled by applying gate voltages to ensure a nearly ideal switching of scaled sub-10 nm TFETs. Critical device factors, such as the drain profile and bandgap engineering, are examined to generate favorable characteristics in the on-current, on-off switching, and off-leakage of the very short TFETs. A mildly doped drain with a pure Ge source is preferred in designing the short-channel graded TFETs for low-power and high-packing-density integrated circuits. Using low bandgap semiconductors in line-tunneling TFETs has demonstrated an excellent combination to simultaneously maximize the on-current and minimize the subthreshold swing. To better understand the physical principle of band-to-band tunneling in low bandgap semiconductors, the physical properties as well as the roles of local and nonlocal electric fields in tunneling processes are elucidated in this thesis. While the nonlocal field related to the tunneling probability dominates in high bandgap materials, the local field associated with the number of incident tunneling electrons plays a more important role in low bandgap semiconductors. Based on the new expression of tunneling generation rate reformulated by decoupling the local and nonlocal fields, this work elucidates the design and modeling of line-tunneling TFETs using low-bandgap materials. The TFET current is derived in term of the minimum tunnel path with friendly analytical forms for practical use. Two prime design factors, the source concentration and gate-insulator thickness, are examined both analytically and numerically, showing the minimum tunnel path can serve as a useful indicator for low-bandgap line-tunneling TFETs. 2023-04-20T11:31:56Z 2023-04-20T11:31:56Z 2014 Dissertation https://scholar.dlu.edu.vn/thuvienso/handle/DLU123456789/115757 en_US application/pdf National Chi Nan University |
| institution |
Thư viện Trường Đại học Đà Lạt |
| collection |
Thư viện số |
| language |
en_US |
| topic |
Device design Analytical modeling Low bandgap semiconductor Low-power application |
| spellingShingle |
Device design Analytical modeling Low bandgap semiconductor Low-power application Nguyễn, Đăng Chiến Design and Modeling of Tunnel Field-Effect Transistors |
| description |
Doctoral Thesis |
| author2 |
Shih, Chun-Hsing |
| author_facet |
Shih, Chun-Hsing Nguyễn, Đăng Chiến |
| format |
Dissertation |
| author |
Nguyễn, Đăng Chiến |
| author_sort |
Nguyễn, Đăng Chiến |
| title |
Design and Modeling of Tunnel Field-Effect Transistors |
| title_short |
Design and Modeling of Tunnel Field-Effect Transistors |
| title_full |
Design and Modeling of Tunnel Field-Effect Transistors |
| title_fullStr |
Design and Modeling of Tunnel Field-Effect Transistors |
| title_full_unstemmed |
Design and Modeling of Tunnel Field-Effect Transistors |
| title_sort |
design and modeling of tunnel field-effect transistors |
| publisher |
National Chi Nan University |
| publishDate |
2023 |
| url |
https://scholar.dlu.edu.vn/thuvienso/handle/DLU123456789/115757 |
| _version_ |
1779408284598403072 |