Different roles and designs of hetero-gate dielectric in single- and double-gate tunnel field-effect transistors

The hetero-gate dielectric (HGD) engineering not only suppresses the ambipolar current but also enhances the on-current of tunnel field-effect transistors (TFETs). Based on two-dimensional device simulations, we examined the roles and designs of hetero-gate dielectric structure in single- and double...

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Chi tiết về thư mục
Những tác giả chính: Nguyễn, Đăng Chiến, Huynh Thi Hong Tham, Luu The Vinh, Chun-Hsing Shih
Định dạng: Journal article
Ngôn ngữ:English
Được phát hành: Dalat University 2023
Những chủ đề:
Truy cập trực tuyến:http://scholar.dlu.edu.vn/handle/123456789/2071
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Thư viện lưu trữ: Thư viện Trường Đại học Đà Lạt
Miêu tả
Tóm tắt:The hetero-gate dielectric (HGD) engineering not only suppresses the ambipolar current but also enhances the on-current of tunnel field-effect transistors (TFETs). Based on two-dimensional device simulations, we examined the roles and designs of hetero-gate dielectric structure in single- and double-gate TFETs. Proper comparisons and analyses show that the roles and designs of source-side dielectric heterojunction are almost similar, whereas those of drain-side dielectric heterojunction are extremely different in single- and double-gate TFETs. For both the device structures, the optimal position of source-side dielectric heterojunction does not depend on the ratio of low/high-k equivalent oxide thicknesses (EOTs). When increasing the EOT ratio, the on-current enhancement by optimized source-side dielectric heterojunction is first increased (EOT ratio < 12) and then saturated (EOT ratio > 12). The role of drain-side dielectric heterojunction in enhancing on-current is limited in double-gate TFETs (every EOT ratio), but significant in single-gate devices (EOT ratio < 12). For EOT ratios < 12, the optimal position of drain-side dielectric heterojunction in double-gate TFETs is around 2-3 nm farther from the source compared to that in single-gate TFETs. For EOT ratios > 12, the optimal position of drain-side dielectric heterojunction in double-gate TFETs is not dependent on the EOT ratio, but that in single-gate TFETs is. Those differences are due to the difference in the depths of local potential wells in two TFET structures.