Short-channel effect and device design of extremely scaled tunnel field-effect transistors
For serving as ideal switching devices in future energy-efficient applications, scaling down the channel lengths of Tunnel-Field Effect Transistors (TFETs) is essential to follow the pace of Si-based CMOS technologies. This work elucidates the short-channel mechanisms and the role of the drain in ex...
Wedi'i Gadw mewn:
| Prif Awduron: | , |
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| Fformat: | Journal article |
| Iaith: | English |
| Cyhoeddwyd: |
2023
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| Pynciau: | |
| Mynediad Ar-lein: | https://scholar.dlu.edu.vn/handle/123456789/2082 |
| Tagiau: |
Ychwanegu Tag
Dim Tagiau, Byddwch y cyntaf i dagio'r cofnod hwn!
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| Thư viện lưu trữ: | Thư viện Trường Đại học Đà Lạt |
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| Crynodeb: | For serving as ideal switching devices in future energy-efficient applications, scaling down the channel lengths of Tunnel-Field Effect Transistors (TFETs) is essential to follow the pace of Si-based CMOS technologies. This work elucidates the short-channel mechanisms and the role of the drain in extremely-scaled TFETs. The scalability of TFETs depends strongly on the appropriately low drain concentration, whereas the capability of the drain for scaling relies on a sufficient drain region. The drain with a light concentration of 5×1017 cm-3 and a minimum length of 20nm enables 5nm TFETs to exhibit favorable on-off switching characteristics. In sub-20nm TFETs, the total drain and channel lengths must satisfy the minimum criteria of approximately 25nm to sustain reversely biased drain voltage of 0.7V. The asymmetric Si1-xGex source heterojunction is combined with the minimum drain design in 5nm TFETs to separately optimize the source- and drain-side tunnel junctions, generating ideal on-/off-currents and switching characteristics to serve as a promising design approach of sub-5nm TFETs. |
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