Increasing drain voltage of low-bandgap tunnel field-effect transistors by drain engineering
Using low-bandgap semiconductors has been definitively designated as a key technique for boosting on-current of tunnel field-effect transistors (TFETs). Based on two-dimensional simulations, this study shows an upper limit of applied drain voltage and then investigates a method of drain design to al...
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2024
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Thư viện Trường Đại học Đà Lạt |
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Low supply voltage Drain engineering low-bandgap transistor Tunnel field-effect transistor (TFET) |
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Low supply voltage Drain engineering low-bandgap transistor Tunnel field-effect transistor (TFET) Nguyễn, Đăng Chiến Chun-Hsing Shih Yu-Hsuan Chen Nguyen Thi Thu Increasing drain voltage of low-bandgap tunnel field-effect transistors by drain engineering |
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Using low-bandgap semiconductors has been definitively designated as a key technique for boosting on-current of tunnel field-effect transistors (TFETs). Based on two-dimensional simulations, this study shows an upper limit of applied drain voltage and then investigates a method of drain design to allow of increasing the drain voltage for enhancing on-current of low-bandgap TFETs without suffering from high ambipolar off-leakage. By designing the drain with a low concentration of 5×1017 cm-3 and a sufficient length of 50 nm, the appropriate drain voltage can be further increased 50% of the bandgap voltage (Eg/q) to improve the on-current of InAs TFET approximately 4 times. |
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Conference paper |
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Nguyễn, Đăng Chiến Chun-Hsing Shih Yu-Hsuan Chen Nguyen Thi Thu |
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Nguyễn, Đăng Chiến Chun-Hsing Shih Yu-Hsuan Chen Nguyen Thi Thu |
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Nguyễn, Đăng Chiến |
| title |
Increasing drain voltage of low-bandgap tunnel field-effect transistors by drain engineering |
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Increasing drain voltage of low-bandgap tunnel field-effect transistors by drain engineering |
| title_full |
Increasing drain voltage of low-bandgap tunnel field-effect transistors by drain engineering |
| title_fullStr |
Increasing drain voltage of low-bandgap tunnel field-effect transistors by drain engineering |
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Increasing drain voltage of low-bandgap tunnel field-effect transistors by drain engineering |
| title_sort |
increasing drain voltage of low-bandgap tunnel field-effect transistors by drain engineering |
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IEEE Publishing |
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2024 |
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https://scholar.dlu.edu.vn/handle/123456789/3311 |
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1798256987835727872 |
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oai:scholar.dlu.edu.vn:123456789-33112024-03-02T11:23:28Z Increasing drain voltage of low-bandgap tunnel field-effect transistors by drain engineering Nguyễn, Đăng Chiến Chun-Hsing Shih Yu-Hsuan Chen Nguyen Thi Thu Low supply voltage Drain engineering low-bandgap transistor Tunnel field-effect transistor (TFET) Using low-bandgap semiconductors has been definitively designated as a key technique for boosting on-current of tunnel field-effect transistors (TFETs). Based on two-dimensional simulations, this study shows an upper limit of applied drain voltage and then investigates a method of drain design to allow of increasing the drain voltage for enhancing on-current of low-bandgap TFETs without suffering from high ambipolar off-leakage. By designing the drain with a low concentration of 5×1017 cm-3 and a sufficient length of 50 nm, the appropriate drain voltage can be further increased 50% of the bandgap voltage (Eg/q) to improve the on-current of InAs TFET approximately 4 times. 10-13 2024-03-02T11:23:21Z 2024-03-02T11:23:21Z 2016 Conference paper Bài báo đăng trên KYHT quốc tế (có ISBN) https://scholar.dlu.edu.vn/handle/123456789/3311 10.1109/ELINFOCOM.2016.7562947 978-1-4673-8017-1 en International Conference on Electronics, Information and Communication (ICEIC) [1] R. Gandhi, Z. Chen, N. Singh, K. Banerjee, and S. Lee, “Vertical Si-nanowire n-type tunneling FETs with low subthreshold swing (≤50 mV/decade) at room temperature,” IEEE Electron Device Lett., vol. 32, no. 4, pp. 437-439, 2011. [2] A. M. Ionescu and H. Riel, “Tunnel field-effect transistors as energy-efficient electronic switches,” Nature, vol. 479, pp. 329-337, 2011. [3] C.-H. Shih and N. D. Chien, “Sub-10-nm tunnel field-effect transistor with graded Si/Ge heterojunction,” IEEE Electron Device Lett., vol. 32, no. 11, pp. 1498-1500, Nov. 2011. [4] W. Y. Choi, B.-G. Park, J. D. Lee, and T.-J. K. Liu, “Tunneling field-effect transistors (TFETs) with subthreshold swing (SS) less than 60 mV/dec,” IEEE Electron Device Lett., vol. 28, no. 8, pp. 743-745, Aug. 2007. [5] S. J. Koester, I. Lauer, A. 0Majumdar, J. Cai, J. Sleight, S. Bedell, P. Solomon, S. Laux, L. Chang, S. Koswatta, W. Haensch, P. Tomasini, and S. Thomas, “Are Si-SiGe tunneling field-effect transistors a good idea?” ECS Trans., vol. 33, no. 6, pp. 357-361, 2010. [6] D. K. Mohata, R. Bijesh, V.Saripalli, T. Mayer, and S. Datta, “Self-aligned gate nanopillar In0.53Ga0.47As vertical tunnel transistor,” in Proceedings of Device Research Conference (DRC, 2011), p. 203. [7] O. M. Nayfeh, J. L. Hoyt, D. A. Antoniadis, “Strained-Si1-xGex/Si band-to-band tunneling transistors: impact of tunnel junction germanium composition and doping concentration on switching behavior,” IEEE Trans. Electron Devices, vol. 56, no. 10, pp. 2264-2269, Oct. 2009. [8] C.-H. Shih and N. D. Chien, “Physical properties and analytical models of band-to-band tunneling in low-bandgap semiconductors,” J. Appl. Phys., vol. 115, no. 4, pp. 014507-014507-7, Jan. 2014. [9] A. C. Ford, C. W. Yeung, S. Chuang, H. S. Kim, E. Plis, S. Krishna, C. Hu, and A. Javey, “Ultrathin body InAs tunneling field-effect transistors on Si substrates”, Appl. Phys. Lett., vol. 98, no. 11, p. 113105, Mar. 2011. [10] C.-H. Shih and N. D. Chien, “Design and modeling of line-tunneling field-effect transistors using low-bandgap semiconductors” IEEE Trans. on Electron Devices, vol. 61, no. 6, pp. 1907-1913, Jun. 2014. [11] Synopsys MEDICI User’s Manual, Synopsys Inc., Mountain View, CA, 2010. [12] E. O. Kane, “Theory of tunneling,” J. Appl. Phys., vol. 31, no. 1, pp. 83-91, 1961. [13] W. G. Vandenberghe, A. S. Verhulst, K.-H. Kao, K. D. Meyer, B. Sorée, W. Magnus, and G. Groeseneken, “A model determining optimal doping concentration and material’s band gap of tunnel field-effect transistors,” Appl. Phys. Lett., Vol. 100, no. 19, pp. 193509-193509-4, May 2012. [14] E.-H. Toh, G. H. Wang, G. Samudra, and Y.-C. Yeo, “Device physics and design of germanium tunneling field-effect transistor with source and drain engineering for low power and high performance applications,” J. Appl. Phys., vol. 103, no. 10, p. 104504, May 2008. [15] N. D. Chien and C.-H. Shih, “Short-channel effect and device design of extremely scaled tunnel field-effect transistors,” Microelectron. Reliability, vol. 55, no. 1, pp. 31-37, Jan. 2015. [16] A. S. Verhulst, W. G. Vandenberghe, K. Maex, and G. Groeseneken, “Tunnel field-effect transistor without gate-drain overlap,” Appl. Phys. Lett., vol. 91, no. 5, p. 053102, Jul. 2007. IEEE Publishing USA |