Transverse scaling of Schottky barrier charge-trapping cells for energy-efficient applications
This work numerically elucidates the effects of transverse scaling on Schottky barrier charge-trapping cells for energy-efficient applications. Together with the scaled gate structures and charge-trapping dielectrics, variations in bias conditions on source-side injection are considered for properly...
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2021
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oai:scholar.dlu.edu.vn:123456789-5052024-03-01T03:33:49Z Transverse scaling of Schottky barrier charge-trapping cells for energy-efficient applications Hung-Jin Teng Yu-Hsuan Chen Jr-Jie Tsai Nguyễn, Đăng Chiến Chenhsin Lien Chun-Hsing Shih Schottky barrier Source-side injection Charge-trapping memory Energy-efficient Non-planar double-gate High-k dielectrics This work numerically elucidates the effects of transverse scaling on Schottky barrier charge-trapping cells for energy-efficient applications. Together with the scaled gate structures and charge-trapping dielectrics, variations in bias conditions on source-side injection are considered for properly operating Schottky barrier cells in low-power or high-efficiency applications. A gate voltage of 5 to 9 V with a drain voltage of 1 to 3 V was employed to program the Schottky barrier cells. Both the non-planar double-gate gate structure and scaled dielectric layers effectively improve the source-side programming. When the gate voltage of 5 V was operated, there were roughly two orders of magnitude greater injected gate currents observed in the ONO-scaled double-gate cells. Five successive programming-trapping iterations were employed to consider the coupling of trapped charges and Schottky barriers, examining the differences in physical mechanisms between different design options. The gate structures, dielectric layers, and gate/drain voltages are key factors in designing transverse scaled Schottky barrier charge-trapping cells for low-power and high-efficiency applications. 10 11 2021-08-25T07:27:40Z 2021-08-25T07:27:40Z 2020 Journal article Bài báo đăng trên tạp chí thuộc ISI, bao gồm book chapter https://scholar.dlu.edu.vn/handle/123456789/505 10.3390/cryst10111036 en Crystals 10.3390/cryst10111036 2073-4352 MDPI |
| institution |
Thư viện Trường Đại học Đà Lạt |
| collection |
Thư viện số |
| language |
English |
| topic |
Schottky barrier Source-side injection Charge-trapping memory Energy-efficient Non-planar double-gate High-k dielectrics |
| spellingShingle |
Schottky barrier Source-side injection Charge-trapping memory Energy-efficient Non-planar double-gate High-k dielectrics Hung-Jin Teng Yu-Hsuan Chen Jr-Jie Tsai Nguyễn, Đăng Chiến Chenhsin Lien Chun-Hsing Shih Transverse scaling of Schottky barrier charge-trapping cells for energy-efficient applications |
| description |
This work numerically elucidates the effects of transverse scaling on Schottky barrier charge-trapping cells for energy-efficient applications. Together with the scaled gate structures and charge-trapping dielectrics, variations in bias conditions on source-side injection are considered for properly operating Schottky barrier cells in low-power or high-efficiency applications. A gate voltage of 5 to 9 V with a drain voltage of 1 to 3 V was employed to program the Schottky barrier cells. Both the non-planar double-gate gate structure and scaled dielectric layers effectively improve the source-side programming. When the gate voltage of 5 V was operated, there were roughly two orders of magnitude greater injected gate currents observed in the ONO-scaled double-gate cells. Five successive programming-trapping iterations were employed to consider the coupling of trapped charges and Schottky barriers, examining the differences in physical mechanisms between different design options. The gate structures, dielectric layers, and gate/drain voltages are key factors in designing transverse scaled Schottky barrier charge-trapping cells for low-power and high-efficiency applications. |
| format |
Journal article |
| author |
Hung-Jin Teng Yu-Hsuan Chen Jr-Jie Tsai Nguyễn, Đăng Chiến Chenhsin Lien Chun-Hsing Shih |
| author_facet |
Hung-Jin Teng Yu-Hsuan Chen Jr-Jie Tsai Nguyễn, Đăng Chiến Chenhsin Lien Chun-Hsing Shih |
| author_sort |
Hung-Jin Teng |
| title |
Transverse scaling of Schottky barrier charge-trapping cells for energy-efficient applications |
| title_short |
Transverse scaling of Schottky barrier charge-trapping cells for energy-efficient applications |
| title_full |
Transverse scaling of Schottky barrier charge-trapping cells for energy-efficient applications |
| title_fullStr |
Transverse scaling of Schottky barrier charge-trapping cells for energy-efficient applications |
| title_full_unstemmed |
Transverse scaling of Schottky barrier charge-trapping cells for energy-efficient applications |
| title_sort |
transverse scaling of schottky barrier charge-trapping cells for energy-efficient applications |
| publisher |
MDPI |
| publishDate |
2021 |
| url |
https://scholar.dlu.edu.vn/handle/123456789/505 |
| _version_ |
1798256964826824704 |