Effects of Edge Thinning on Fowler-Nordheim Tunneling Current of NAND-Type Flash Memory Cells

The edge thinning of tunnel oxide is numerically found to increase the Fowler-Nordheim (FN) tunneling gate current in NAND-type Flash cells during programming and erasing operations. This work explores the effect of edge thinning profile in tunnel-oxide on FN tunneling current, and examines the impa...

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Những tác giả chính: Ji-Ting Liang, Chun-Hsing Shih, Yan-Xiang Luo, Ming-Kun Huang, Nguyễn, Đăng Chiến, Ruei-Kai Shia, Sau-Mou Wu, Chenhsin Lien, Wen-Fa Wu
Định dạng: Conference paper
Ngôn ngữ:English
Được phát hành: Taiwan (China) 2024
Truy cập trực tuyến:https://scholar.dlu.edu.vn/handle/123456789/3305
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spelling oai:scholar.dlu.edu.vn:123456789-33052024-03-02T09:51:10Z Effects of Edge Thinning on Fowler-Nordheim Tunneling Current of NAND-Type Flash Memory Cells Ji-Ting Liang Chun-Hsing Shih Yan-Xiang Luo Ming-Kun Huang Nguyễn, Đăng Chiến Ruei-Kai Shia Sau-Mou Wu Chenhsin Lien Wen-Fa Wu The edge thinning of tunnel oxide is numerically found to increase the Fowler-Nordheim (FN) tunneling gate current in NAND-type Flash cells during programming and erasing operations. This work explores the effect of edge thinning profile in tunnel-oxide on FN tunneling current, and examines the impact of symmetrical and asymmetric geometry on the FN tunneling current in NAND-type Flash cells. 2024-03-02T09:51:07Z 2024-03-02T09:51:07Z 2011 Conference paper Bài báo đăng trên KYHT trong và ngoài nước (không có ISBN) https://scholar.dlu.edu.vn/handle/123456789/3305 en Symposium on Nano Device Technology (SNDT) [1] International Technology Roadmap for Semiconductor, 2007 edition. [2] Y. Taur and Tak H. Ning, Fundamentals of modern VLSI devices, Cambridge University Press, 1998. [3] K. Prall, “Scaling non-volatile memory below 30nm,” in IEEE NVSMW, 2007, pp. 5-9. [4] H. Yang, H. Kim, S.-I. Park, J. Kim, S.-H. Lee, J.-K. Choi, D. Hwang, C. Kim, M. Park, K.-H. Lee, Y.-K. Park, J. K. Shin, and J.-T. Kong, “Reliability issues and models of sub-90nm NAND Flash memory cells,” in IEEE Int. Conf. on Solid-State and Integrated-Circuit Technology, 2006, pp. 760-762. [5] B. Kim, W.-H. Kwon, C.-K. Baek, Y. Son, C.-K. Park, K. Kim, and D. M. Kim, “Edge profile effect of tunnel oxide on erase threshold-voltage distributions in Flash memory cells,” IEEE Trans. Electron Devices, vol. 53, no. 12, pp. 3012-3019, Dec. 2006. [6] J. Lee, J. Kim, W. Lee, S. Lee, H. Lim, J. Lee, S. Nam, H. Lee and C. Song, “Effect of STI shape and tunneling oxide thinning on cell Vth variation in the flash memory” in Proc. IEEE IRPS, 2005, pp. 670-671. [7] M. Park, K. Suh, K. Kim, S.-H. Hur, K. Kim, and W.-S. Lee, “The effect of trapped charge distributions on data retention characteristics of NAND Flash memory cells,” IEEE Electron Device Lett., vol. 28, no. 8, pp. 750-752, Aug. 2007. [8] H. Watanabe, K. Shimizu, Y. Takeuchi, and S. Aritome, “Corner-rounded shallow trench isolation technology to reduce the stress-induced tunnel oxide leakage current for highly reliable flash memories,” in IEDM Tech. Dig., 1996, pp. 833-836. [9] C.-Y. Ho, C.-H. Shih, ”Edge encroachments and suppressions of tunnel oxide in Flash memory cells,” IEEE Electron Devices Lett., vol. 29, pp. 1159-1162, Oct. 2008. [10] M. Park, C.-S. Lee, S.-H. Hur, K. Kim, and W.-S. Lee, “The effect of field oxide recess on cell VTHdistribution of NAND Flash cell arrays,” IEEE Electron Devices Lett., vol. 29, pp. 1050-1052, Sep. 2008. [11] Synopsys MEDICI User’s Manual, Synopsys Inc., Mountain View, CA, 2006. Taiwan (China)
institution Thư viện Trường Đại học Đà Lạt
collection Thư viện số
language English
description The edge thinning of tunnel oxide is numerically found to increase the Fowler-Nordheim (FN) tunneling gate current in NAND-type Flash cells during programming and erasing operations. This work explores the effect of edge thinning profile in tunnel-oxide on FN tunneling current, and examines the impact of symmetrical and asymmetric geometry on the FN tunneling current in NAND-type Flash cells.
format Conference paper
author Ji-Ting Liang
Chun-Hsing Shih
Yan-Xiang Luo
Ming-Kun Huang
Nguyễn, Đăng Chiến
Ruei-Kai Shia
Sau-Mou Wu
Chenhsin Lien
Wen-Fa Wu
spellingShingle Ji-Ting Liang
Chun-Hsing Shih
Yan-Xiang Luo
Ming-Kun Huang
Nguyễn, Đăng Chiến
Ruei-Kai Shia
Sau-Mou Wu
Chenhsin Lien
Wen-Fa Wu
Effects of Edge Thinning on Fowler-Nordheim Tunneling Current of NAND-Type Flash Memory Cells
author_facet Ji-Ting Liang
Chun-Hsing Shih
Yan-Xiang Luo
Ming-Kun Huang
Nguyễn, Đăng Chiến
Ruei-Kai Shia
Sau-Mou Wu
Chenhsin Lien
Wen-Fa Wu
author_sort Ji-Ting Liang
title Effects of Edge Thinning on Fowler-Nordheim Tunneling Current of NAND-Type Flash Memory Cells
title_short Effects of Edge Thinning on Fowler-Nordheim Tunneling Current of NAND-Type Flash Memory Cells
title_full Effects of Edge Thinning on Fowler-Nordheim Tunneling Current of NAND-Type Flash Memory Cells
title_fullStr Effects of Edge Thinning on Fowler-Nordheim Tunneling Current of NAND-Type Flash Memory Cells
title_full_unstemmed Effects of Edge Thinning on Fowler-Nordheim Tunneling Current of NAND-Type Flash Memory Cells
title_sort effects of edge thinning on fowler-nordheim tunneling current of nand-type flash memory cells
publisher Taiwan (China)
publishDate 2024
url https://scholar.dlu.edu.vn/handle/123456789/3305
_version_ 1798256984787517440