DIFFERENT ROLES AND DESIGNS OF HETERO-GATE DIELECTRIC IN SINGLE- AND DOUBLE-GATE TUNNEL FIELD-EFFECT TRANSISTORS
Hetero-gate dielectric (HGD) engineering not only suppresses the ambipolar current but also enhances the on-current of tunnel field-effect transistors (TFETs). Based on two-dimensional device simulations, we examined the roles and designs of hetero-gate dielectric structure in single- and double-gat...
Đã lưu trong:
| Những tác giả chính: | , , , |
|---|---|
| Định dạng: | Bài viết |
| Ngôn ngữ: | English |
| Được phát hành: |
Trường Đại học Đà Lạt
2023
|
| Truy cập trực tuyến: | https://scholar.dlu.edu.vn/thuvienso/handle/DLU123456789/114375 https://tckh.dlu.edu.vn/index.php/tckhdhdl/article/view/745 |
| Các nhãn: |
Thêm thẻ
Không có thẻ, Là người đầu tiên thẻ bản ghi này!
|
| Thư viện lưu trữ: | Thư viện Trường Đại học Đà Lạt |
|---|
| Tóm tắt: | Hetero-gate dielectric (HGD) engineering not only suppresses the ambipolar current but also enhances the on-current of tunnel field-effect transistors (TFETs). Based on two-dimensional device simulations, we examined the roles and designs of hetero-gate dielectric structure in single- and double-gate TFETs. Proper comparisons and analyses show that the roles and designs of source-side dielectric heterojunctions are similar, whereas those of drain-side dielectric heterojunctions are extremely different in single- and double-gate TFETs. For both device structures, the optimal position of a source-side dielectric heterojunction does not depend on the ratio of low/high-k equivalent oxide thicknesses (EOTs). When increasing the EOT ratio, the on-current enhancement by an optimized source-side dielectric heterojunction is first increased (EOT ratio < 12) and then saturated (EOT ratio > 12). The role of a drain-side dielectric heterojunction in enhancing on-current is limited in double-gate TFETs (every EOT ratio), but significant in single-gate devices (EOT ratio < 12). For EOT ratios < 12, the optimal position of a drain-side dielectric heterojunction in double-gate TFETs is around 2-3 nm farther from the source compared to that in single-gate TFETs. For EOT ratios > 12, the optimal position of a drain-side dielectric heterojunction in double-gate TFETs is not dependent on the EOT ratio, unlike single-gate TFETs. Those differences are due to the difference in the depths of local potential wells in the two TFET structures. |
|---|