Design and Modeling of Tunnel Field-Effect Transistors

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Design and Modeling of Tunnel Field-Effect Transistors

Doctoral Thesis

Đã lưu trong:

Sonraí Bibleagrafaíochta
Príomhúdar:	Nguyễn, Đăng Chiến
Údair Eile:	Shih, Chun-Hsing
Formáid:	Dissertation
Teanga:	en_US
Foilsithe:	National Chi Nan University 2023
Ábhair:	Device design Analytical modeling Low bandgap semiconductor Low-power application
Rochtain Ar Líne:	https://scholar.dlu.edu.vn/thuvienso/handle/DLU123456789/115757
Clibeanna:	Cuir Clib Leis Gan Chlibeanna, Bí ar an gcéad duine leis an taifead seo a chlibeáil!

Thư viện lưu trữ:	Thư viện Trường Đại học Đà Lạt

Míreanna Comhchosúla

Suitability of low-bandgap semiconductors for energy-efficient tunnel-field effect transistors
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Design and modeling of line-tunneling field-effect transistors using low bandgap semiconductors
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Foilsithe: (2024)

Increasing drain voltage of low-bandgap tunnel field-effect transistors by drain engineering
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Roles of gate-oxide thickness reduction in scaling bulk and thin-body tunnel field-effect transistors
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Foilsithe: (2023)

A very low bandgap line-tunnel field effect transistor with channel-buried oxide and laterally doped pocket
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A VERY LOW BANDGAP LINE-TUNNEL FIELD EFFECT TRANSISTOR WITH CHANNEL-BURIED OXIDE AND LATERALLY DOPED POCKET
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Foilsithe: (2024)

Oxide thickness-dependent effects of source doping profile on the performance of single- and double-gate tunnel field-effect transistors
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Foilsithe: (2023)

Bandgap-dependent onset behavior of output characteristics in line-tunneling field-effect transistors
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Foilsithe: (2023)

Design optimization of extremely short-channel graded Si/SiGe heterojunction tunnel field-effect transistors for low power applications
le: Nguyễn, Đăng Chiến, et al.
Foilsithe: (2024)

Bandgap-dependent deviations of local and nonlocal from mixed band-to-band tunneling models
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Foilsithe: (2024)

Short-channel effect and device design of extremely scaled tunnel field-effect transistors
le: Nguyễn, Đăng Chiến, et al.
Foilsithe: (2023)

A simple approach for integrating quantum confinement effects into TCAD Simulations of tunnel field-effect transistors
le: Bui Huu Thai, et al.
Foilsithe: (2024)

Sub-10nm tunnel field-effect transistor with graded Si/Ge heterojunction
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Operation and modeling of the MOS transistor
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A highly adaptive and efficient router architecture for network-on-chip /
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Different scalabilities of N- and P-Type tunnel field-effect transistors with Si/SiGe heterojunctions
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